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dc.contributor.author Azambuja, José Rodrigo Furlanetto de
dc.contributor.author Scarpato, Maurício Altieri
dc.contributor.author Becker, Jürgen
dc.contributor.author Kastensmidt, Fernanda Gusmão de Lima
dc.date.accessioned 2015-05-30T21:49:16Z
dc.date.available 2015-05-30T21:49:16Z
dc.date.issued 2013
dc.identifier.citation AZAMBUJA, José Rodrigo Furnaletto de et. al. HETA: hybrid error-detection technique using assertions. IEEE Transactions on Nuclear Science, v. 60, n. 4, p. 2805-2812, 2013. Disponível em: <http://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=6482684>. Acesso em: 24 abr. 2015. pt_BR
dc.identifier.issn 0018-9499
dc.identifier.uri http://repositorio.furg.br/handle/1/4962
dc.description.abstract This paper presents HETA, a hybrid technique based on assertions and a non-intrusive enhanced watchdog module to detect SEE faults in microprocessors. These types of faults have a major influence in the microprocessor’s control flow, causing incorrect jumps in the program’s execution flow. In order to protect the system, a non-intrusive hardware module is implemented in order to monitor the data exchanged between the microprocessor and its memory. Since the hardware itself is not capable of detecting all control flow errors, it is enhanced to support a new software-based technique. Also, previous techniques are used to reach higher detection rates. A fault injection campaign is performed using a MIPS microprocessor. Simulation results show high detection rates with a small amount of performance degradation and area overhead. pt_BR
dc.language.iso eng pt_BR
dc.rights restrict access pt_BR
dc.subject Fault tolerance pt_BR
dc.subject Hybrid fault tolerance techniques pt_BR
dc.subject Microprocessors pt_BR
dc.subject SEEs pt_BR
dc.title HETA: hybrid error-detection technique using assertions pt_BR
dc.type article pt_BR
dc.identifier.doi 10.1109/TNS.2013.2246798 pt_BR


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