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dc.contributor.author Azambuja, José Rodrigo Furlanetto de
dc.contributor.author Brown, Gustavo
dc.contributor.author Kastensmidt, Fernanda Gusmão de Lima
dc.contributor.author Carro, Luigi
dc.date.accessioned 2015-05-31T21:20:06Z
dc.date.available 2015-05-31T21:20:06Z
dc.date.issued 2014
dc.identifier.citation AZAMBUJA, José Rodrigo Furnaletto de et. al. Algorithm transformation methods to reduce the overhead of software-based fault tolerance techniques. Microelectronics Reliability, v. 54, n. 5, p. 1050-1055. 2014. Disponível em: <http://www.sciencedirect.com/science/article/pii/S0026271413004320#>. Acesso em: 08 maio 2015. pt_BR
dc.identifier.issn 0026-2714
dc.identifier.uri http://repositorio.furg.br/handle/1/4971
dc.description.abstract This paper introduces a framework that tackles the costs in area and energy consumed by methodologies like spatial or temporal redundancy with a different approach: given an algorithm, we find a transformation in which part of the computation involved is transformed into memory accesses. The precomputed data stored in memory can be protected then by applying traditional and well established ECC algorithms to provide fault tolerant hardware designs. At the same time, the transformation increases the performance of the system by reducing its execution time, which is then used by customized software-based fault tolerant techniques to protect the system without any degradation when compared to its original form. Application of this technique to key algorithms in a MP3 player, combined with a fault injection campaign, show that this approach increases fault tolerance up to 92%, without any performance degradation. pt_BR
dc.language.iso por pt_BR
dc.rights restrict access pt_BR
dc.title Algorithm transformation methods to reduce the overhead of software-based fault tolerance techniques pt_BR
dc.type article pt_BR
dc.identifier.doi 10.1016/j.microrel.2013.11.011 pt_BR


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