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dc.contributor.author Azambuja, José Rodrigo Furlanetto de
dc.contributor.author Lapolli, Ângelo Cardoso
dc.contributor.author Rosa, Lucas Lemos
dc.contributor.author Kastensmidt, Fernanda Gusmão de Lima
dc.date.accessioned 2015-05-31T23:00:39Z
dc.date.available 2015-05-31T23:00:39Z
dc.date.issued 2011
dc.identifier.citation AZAMBUJA, José Rodrigo Furnaletto de et al. Detecting SEEs in microprocessors through a non-intrusive hybrid technique. IEEE Transactions on Nuclear Science, v. 58, n. 3, p. 993-1000, 2011. Disponível em:<http://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=5720529>. Acesso em: 13 maio 2015. pt_BR
dc.identifier.issn 0018-9499
dc.identifier.uri http://repositorio.furg.br/handle/1/4978
dc.description.abstract This paper presents a hybrid technique based on software signatures and a hardware module with watchdog and decoder characteristics to detect SEU and SET faults in microprocessors. These types of faults have a major influence in the microprocessor’s control-flow, affecting the basic blocks and the transitions between them. In order to protect the transitions between basic blocks a light hardware module is implemented in order to spoof the data exchanged between the microprocessor and its memory. Since the hardware alone is not capable of detecting errors inside the basic blocks, it is enhanced to support the new technique and then provide full control-flow protection. A fault injection campaign is performed using a MIPS microprocessor. Simulation results show high detection rates with a small amount of performance degradation and area overhead. pt_BR
dc.language.iso eng pt_BR
dc.rights restrict access pt_BR
dc.subject Fault tolerance pt_BR
dc.subject Hybrid fault tolerance techniques pt_BR
dc.subject Microprocessors pt_BR
dc.subject SEEs pt_BR
dc.title Detecting SEEs in microprocessors through a non-intrusive hybrid technique pt_BR
dc.type article pt_BR
dc.identifier.doi 10.1109/TNS.2011.2109398 pt_BR


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