Methods and metrics for reliability assessment

dc.contributor.author	Naviner, Lirida Alves de Barros
dc.contributor.author	Naviner, Jean-François
dc.contributor.author	Franco, Denis Teixeira
dc.contributor.author	Vasconcelos, Maï Correia de
dc.date.accessioned	2012-01-04T13:17:06Z
dc.date.available	2012-01-04T13:17:06Z
dc.date.issued	2009
dc.identifier.citation	NAVINER, Lirida Alves de Barros. et al. Methods and metrics for reliability assessment. In: Fault-Tolerant Distributed Algorithms on VLSI Chips, v.1, p. 1-14, 2009. Disponível em: <http://drops.dagstuhl.de/volltexte/2009/1925/pdf/08371.NavinerLirida.Paper.1925.pdf>. Acesso em: 13 dez. 2011.	pt_BR
dc.identifier.uri	http://repositorio.furg.br/handle/1/1687
dc.description.abstract	This paper deals with digital VLSI design aspects related to reliability. The focus is on the problem of reliability evaluation in combinational logic circuits.We present some methods for this evaluation that can be easily integrated in a tradidional design flow. Also we describe suitable metrics for performance estimation of concurrent error detection schemes.	pt_BR
dc.language.iso	eng	pt_BR
dc.rights	open access	pt_BR
dc.subject	Reliability	pt_BR
dc.subject	Fault tolerance	pt_BR
dc.subject	Combinational logic	pt_BR
dc.title	Methods and metrics for reliability assessment	pt_BR
dc.type	conferenceObject	pt_BR

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